GigaDevice launches GD32F50MxxG series highly integrated motor control MCU

GigaDevice, a leading semiconductor device supplier, has officially launched the GD32F50MxxG series highly integrated motor control MCU designed for humanoid robots, collaborative robotic arms, and dexterous hands. The product uses a solution that co-packages the MCU with self-developed analog chips, integrating a three-phase gate driver and 4 high-bandwidth, low-temperature-drift rail-to-rail operational amplifiers on a single chip. With four major advantages — 252MHz Cortex?-M33 computing power, ultimate integration, miniaturized packaging, and comprehensive functional safety — it provides a one-stop solution to industry pain points such as discrete multi-chip robot joints, space constraints, poor signal sampling, and severe EMI interference, serving as an integrated hardware foundation for lightweight servo joints.

Core Architecture: Self-Developed Dual Analog Chips Co-Packaged for Integrated Computing Power and Drive

The greatest core advantage of the GD32F50MxxG series is the co-packaging of GigaDevice's self-developed analog chips inside the package: the GD30DR1401 three-phase gate driver and the GD30AP8604 4-channel rail-to-rail operational amplifier, eliminating the need for external independent drivers and sampling op-amps, and greatly simplifying BOM and PCB routing.

1. Co-Packaged GD30DR1401 Three-Phase Gate Driver

Supply voltage 5.0V–20V, floating withstand voltage 120V, built-in bootstrap diode; gate source current 2A and sink current 2.5A, mated with 6 dedicated PWM interfaces, natively compatible with FOC vector control of 24–48V low-voltage torque motors, and featuring integrated hardware protection.

2. Co-Packaged GD30AP8604 4-Channel Operational Amplifier

Unity-gain bandwidth 11MHz, slew rate 11V/μs, built-in RF/EMI filtering, low noise 8nV/√Hz@1kHz, 2.6V–3.6V supply; designed specifically for motor current sampling and amplification of weak differential signals from encoders/resolvers; rail-to-rail input and output deliver a wider range of measured signals.

The series MCU is built on an Arm? Cortex?-M33 core with a maximum main frequency of 252MHz and comes standard with hardware FPU, DSP instruction set, and MPU memory protection unit. The memory configuration provides up to 1MB total Flash, including 192KB zero-wait-state Code-Flash, paired with 128KB SRAM (32KB with ECC check), ensuring high-speed, stable read/write of motion code and sampled data. Twelve DMA channels share the data transfer workload of ADC, PWM, and bus in parallel, freeing CPU computing power for focused closed-loop operations. Multiple high-precision on-chip clocks and PLLs are built in to support both low-speed precision positioning and high-speed dynamic motion.

Full-Stack Peripheral Resources Deliver Integrated Advantages for Robot Scenario Deployment

Motor control and analog acquisition peripherals are tailored for high-precision joint sensing and driving.

Full timer resource coverage: 5 general-purpose 16-bit timers, 2 advanced timers, 2 basic timers, and 1 high-precision 32-bit timer, along with a hardware watchdog and RTC. Multiple complementary PWM outputs directly connect to the co-packaged gate driver, perfectly supporting three-phase brushless motor drive.

The chip integrates 3 12-bit ADCs (15–20 acquisition channels), 1 high-speed comparator, and 1 12-bit DAC on-chip. Working with the 4 co-packaged op-amps, it synchronously samples three-phase currents, motor temperature, and weak tactile sensing signals. The COMP hardware triggers fault shutdown at extreme speed, preventing stall and overload from damaging equipment.

Industrial communication interfaces support multi-joint synchronized networking.

Standard features include 2 CAN-FD, 1 USB 2.0 FS, 3 SPI, 2 I2C, and 5 U(S)ART interfaces, enabling multi-joint cascade coordination, encoder/torque sensor interfacing, and local storage of motion trajectory parameters, meeting communication needs for full-body multi-axis linkage of humanoid robots and cluster scheduling of robotic arms.

Targeting Core Segmented Robot Scenarios

• Humanoid robot joints: Compared with traditional discrete solutions, the co-packaged integrated solution reduces peripheral components and greatly shrinks the driver board area. Single-chip closed-loop control achieves smooth single-axis motion, CAN-FD multi-axis synchronization ensures multi-joint coordination accuracy, compact packaging fits confined cavities, weight is reduced and assembly simplified, and multi-level hardware protection safeguards motion safety.

• Dexterous hands: QFN/BGA compact packages meet small-space application requirements; a single chip drives multiple micro motors, greatly reducing hardware development complexity for dexterous hands.

• Small collaborative robotic arms and AGV drive servos: The 120V withstand-voltage gate driver fits mainstream 24–48V industrial low-voltage motors without additional power conversion, reducing system cost and conversion losses. The CAN-FD bus supports device cluster networking, and combined with FOC algorithms that suppress torque ripple, smooth operation is achieved.

Dual Protection of Information Security and Functional Safety, Meeting Industry Compliance Requirements

The chip integrates a complete hardware security module: TRNG true random number generator, SHA256 hash unit, AES128/192/256 hardware encryption engine, paired with an EFUSE secure storage area to lock joint calibration parameters. It supports SBSFU secure boot and secure firmware update, integrity verification, and anti-rollback. The products and product development management system comply with the EU Cyber Resilience Act (CRA) regulatory requirements and IEC 62443 security standards, as well as various relevant international industry standards, and can provide downstream OEMs with information security solutions and certification consulting.

In addition, the chip has passed IEC 61508 SIL2 functional safety certification and is accompanied by a complete MCU hardware self-test library that performs real-time diagnosis of core, memory, analog, and driver circuit faults, quickly cutting off motor output under abnormal conditions to ensure equipment and personal safety.

The GD32F50MxxG series provides two miniaturized packages adapted to joint designs of different sizes. Among them, the GD32F50MMGO7G 8mm×8mm QFN80 small-size model is the preferred solution for micro joints; sample applications are now open, and mass production will officially begin in December 2026. The GD32F50MVGK7G 7mm×7mm BGA100 miniaturized package model is planned to start sampling in early November 2026, with volume supply to be achieved in March 2027.

The series MCU is currently in the early stage of market introduction. Sales outlets can be contacted through GigaDevice's official website (https://www.gigadevice.com.cn/about/sales) to apply for complete sets of samples and technical documentation, including FOC motor reference projects, joint drive development kits, and evaluation boards.